APM86190 Product Brief (Preliminary)


[PDF]APM86190 Product Brief (Preliminary) - Rackcdn.comc1170156.r56.cf3.rackcdn.com/UK_AMC_APM86190-SGA800T_DS.pdfCachedSimilarThe Single-Core IP Proc...

53 downloads 184 Views 109KB Size

APM86190 | Single-Core Power™ Processor

The AppliedMicro APM86190 architecture is optimized for next-generation multifunction printers, enterprise control planes, consumer NAS systems, wireless access points, and industrial applications by offering the industry’s most advanced capabilities in power management, security, and concurrency. The APM86190 architecture provides a platform whose components can play the role of various functions that operate today as single CPUs, ASICs, and/or FPGAs, for performance and power sensitive applications.

Features • Single-Core Power™465 processor with a Floating Point Unit • 32 KB I- and 32 KB D-cache L1 • 256 KB L2 cache • Hardware cache coherency • DDR3 memory controller with optional ECC (72-bit) Offload Features • Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and publickey protocols (PKA) • True Random Number Generator (TRNG) • Ethernet Classification Engine • Packet DMA • SLIMpro acceleration / offload engine Queue Manager / Traffic Manager • Message passing architecture • Manages 256 fixed size Queues High-Speed Interfaces • Two GE ports (RGMII) with Classification and TCP/IP off-load • One PCI Express® Gen 1/2 (x4/x1) port • Two PCI Express® Gen 1/2 (x1) ports • Two USB 2.0 Hosts with integrated PHYs • One USB 2.0 OTG with integrated PHY • Two SATA 2.0 ports Other Interfaces • Local Bus (EBUS) • NAND Flash Controller • LCD Controller • • • • • •

Two I2C Four UARTs GPIOs Two SPI Two SDIO 3.0 JTAG / Trace

The Single-Core IP Processor for Performance Applications The APM86190 PACKETpro™ architecture offers high-end processing performance. The innovative SoC subsystem design features the Scalable Lightweight Intelligent Management processor (SLIMpro) to enable breakthrough flexibility in power management, resiliency, and end-to-end security for a wide range of applications from wired and wireless networking systems, to multi-function printers, industrial, access points, and other mission-critical embedded systems. At the heart of the APM86190 is a 1.2-GHz 465 processor core based on Power™ Architecture with an individual Floating Point processor. The Power core is programmable through an industry-standard instruction set architecture (ISA). In addition, this processor is assisted by a rich set of configurable accelerators focused on packet classification, security, packet/data manipulation, and scheduling. The APM86190 architecture introduces a unique congestion-aware and management capability to optimize its available processing resources. This allows for full use control on bandwidth and services. Designed in 40nm bulk CMOS technology, the APM86190 offers the best-in-class cost versus processing performance in a low-power envelope. 465 Processor Complex Features The APM86190 incorporates one high performance 465 processor. The 465 has five independent pipelines, a 32-KB data cache and a 32-KB instruction cache (which are 64-way set associative), and an IEEE floating point unit (FPU). The 465 core has a dedicated 256KB L2 cache with hardware cache coherency that attaches to the high-performance Processor Local Bus 5 (PLB5). APM86190 Key Features AppliedMicro delivers the best-in-class feature set for our Printing and Imaging customers.

AppliedMicro Proprietary

Dedicated Ethernet Offload Engine In order to meet the needs of very low power and all-IP networks, the APM86190 includes a dedicated Ethernet Offload Engine. The Ethernet Offload Engine is capable of doing Inline IPSec with greater than 2-Gbps line rate throughput. It also provides for Inline TCP/IP and UDP checksums along with Energy Efficiency Ethernet capabilities (802.3az). Classification Engine The classification engine provides for flow, CoS, and port-based classification of data with 64-byte packet line-rate performance. It is programmable and can support IPv4, IPv6, and AppleTalk, as well as customer proprietary protocols. Queue Manager / Traffic Manager (QMTM) The Queue Manager / Traffic Manager is an important design consideration for the APM86190 and allows for the most efficient moving of packets/data between the processors and peripherals using a message passing architecture. This is accomplished through a central communication interface that offloads software from the routing of packets and from transaction synchronization. The Queue Manager can be used to: centralize management of all transaction traffic, reduce communication overhead between software and hardware, and perform inter-processor message passing and work scheduling. SLIMpro – Power Management The APM86190 integrates a dedicated 32-bit SLIMpro acceleration processor that provides advanced capabilities such as dynamic power management and higher layer network acceleration. The SLIMpro processor leverages the APM86190 message passing architecture and other acceleration subsystems in order to provide applicationspecific processor offloads. It also provides advanced wake up capabilities from Deep Sleep Mode such as Wake on LAN, Wake on USB, Wake on PCIe, and Wake on Interrupts.

APM86190 | 465 Family

DDR3

APM86190

I2C

2 x RGMII

LCD

GPIO

PCIe x4

DDR PHY Interrupts

Deep Sleep Power Domain I2C 1

PPC Mailbox

Mem Queue

SLIMPRO

SCU

IPSec

RTC

Classifier

Security

Chksum / TSO

EFuse + ROM

S D U

MPIC

LCD

2 x 10/100/1G MAC

64 + ECC DDR3

QMLite

SoC Power Domain

PCIe x1 / SATA 2

PCIe x1

SATA 2

SERDES x1

Packaging • 676-pin FC-PBGA, 27mm x 27mm with 1.0mm pad pitch

SATA 2

Signal I/Os • 425

Advanced DMA The Packet DMA can be used to perform memory-to-memory transfers, which include the SDRAM, SRAM, PCIe, and EBUS memory spaces. Transfers can also include certain “onthe-fly” data manipulations such as: checksum generation or checking, CRC generation or checking, or XOR. The Packet DMA comprehends data packet delineation, which

SERDES x1

Power Supply • 0.9V (CPU/SoC logic), 1.5V (DDR3), 1.8 V, 2.5 V, and 3.3 V

SATA 2

Junction Temperature Range • 0ºC to +110ºC

SERDES x1

Typical Power Dissipation • <6.1W at 1.2 GHz

PCIe x1 Gen2

Performance • 2400 Dhrystone 2.1 MIPS @ 1.2 GHz

APM86190 Partner Ecosystem AppliedMicro's APM86190 processors are supported by an extensive Partner ecosystem of products and services from a wide range of leading suppliers, including industry standard providers of: • Embedded operating systems • Hardware and software development tools • Embedded software products and services • Board-level products • System design services • Technical training AppliedMicro offers an evaluation kit for product evaluation and for early software development.

PCIe x1 Gen2

465 Core Frequency • Up to 1.2 GHz

SERDES x4

# Power Core / L2 Cache • 1x 465 core / 256 KB L2 cache

enables it to perform a comprehensive list of scatter/gather operations for packet assembly and disassembly with minimal software intervention.

Advanced Security Engine The APM86190 can deliver advanced security capabilities with the optional security engine. This security engine utilizes the QMTM for the fastest possible throughput between the 465 processor, memory, and the security engine itself. The security engine supports the following algorithms: DES, 3DES, AES, ARC-4 encryption, MD-5, SHA-1, SHA-256, and SHA512 hashing with or without HMAC, Kasumi F8/ F9, and also includes acceleration for the following protocols: IPSec, SSL/TLS/DTLS, and SRTP/SRTCP. A true random number generator and a public key accelerator are also included.

PCIe x4 Gen2

Specifications

Adapter I/F

PLB5

PLB5 / HBF

HBF

L2 Cache 256 KB

Classifier

Security

Queue Mgr Traffic Mgr

HBF / AHB PPC465 0

Context Mgr

Packet DMA

32KB OCM

XOR

AHB

FPU

2 x USB 2.0 Host w/ PHY

1 x USB 2.0 OTG w/ PHY

2 x SDIO

NAND + NOR + EBUS

Clocks

AHB / APB APB

2 x USB2

1 x USB2

DATA/ADDR

GPIO

2 x SPI

Trace

4 x UART

I2C 0

JTAG

DATA/ADDR

For technical support, please call 1-800-840-6055 or 858-535-6517, or email [email protected]. AppliedMicro reserves the right to make changes to its products, its data sheets, or related documentation, without notice and warrants its products solely pursuant to its terms and conditions of sale, only to substantially comply with the latest available data sheet. Please consult AppliedMicro’s Term and Conditions of Sale for its warranties and other terms, conditions and limitations. AppliedMicro may discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information is current. AppliedMicro does not assume any liability arising out of the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. AppliedMicro reserves the right to ship devices of higher grade in place of those of lower grade. APPLIEDMICRO SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. AppliedMicro, AMCC, and PACKETpro are trademarks of Applied Micro Circuits Corporation. Power and the Power logo are registered trademarks of Power.org. All other trademarks are the property of their respective holders. Copyright © 2010 Applied Micro Circuits Corporation. All Rights Reserved. APM86190_PB_v1.03_20120216

215 Moffett Park Drive, Sunnyvale, CA 94089 phone 408 542 8600 fax 408 542 8601 appliedmicro.com

AppliedMicro Proprietary