APM86791 | Single-Core Power™ Processor
The AppliedMicro APM86791 architecture is optimized for next-generation enterprise control planes, multifunction printers, and wireless access points by offering the industry’s most advanced capabilities in power management and security. The APM86791 architecture provides a platform whose components can play the role of various functions that operate today as single CPUs, ASICs, and/or FPGAs, for performance and power sensitive applications.
Features • Single-Core Power™465 processor with a Floating Point Unit • 32 KB I- and 32 KB D-cache L1 • 256 KB L2 cache • Hardware cache coherency • DDR3 memory controller with optional ECC (18/36-bit) Offload Features • Security subsystem (optional) with acceleration for IPSec, SSL/TLS, SRTP/SRTCP, Kasumi, and publickey protocols (PKA) • True Random Number Generator (TRNG) • Ethernet Classification Engine • Packet DMA • SLIMpro acceleration / offload engine Queue Manager / Traffic Manager • Message passing architecture • Manages 256 fixed size Queues High-Speed Interfaces • Four 10/100/1000 Ethernet ports: 2x RGMII and 2x SGMII with Classification and TCP/IP off-load • Two PCI Express® Gen 1/2 (x1) ports • One USB 2.0 Host with integrated PHY/Serdes • One USB 2.0 Host/Device with integrated PHY/Serdes • One SATA 2.0 port Other Interfaces • Local Bus (EBUS) • NAND Flash Controller • • • • • • •
Two I2C Four UARTs GPIOs Two SPI Two SDIO 3.0 Two HDLC Controllers JTAG / Trace
The Single-Core IP Processor for Performance Applications The APM86791 PACKETpro™ architecture offers high-end processing performance. The innovative SoC subsystem design features the Scalable Lightweight Intelligent Management processor (SLIMpro) to enable breakthrough flexibility in power management, resiliency, and end-to-end security for a wide range of applications from wired and wireless networking systems, to multi-function printers, access points, and other mission-critical embedded systems. At the heart of the APM86791 is a 1.0-GHz 465 processor core based on Power™ Architecture with a Floating Point processor. The Power core is programmable through an industry-standard instruction set architecture (ISA). In addition, this processor is assisted by a rich set of configurable accelerators focused on packet classification, security, packet/data manipulation, and scheduling. The APM86791 architecture introduces a unique congestion-aware and management capability to optimize its available processing resources. This allows for full use control on bandwidth and services. Designed in 40nm bulk CMOS technology, the APM86791 offers the best-in-class cost versus processing performance in a low-power envelope. 465 Processor Complex Features The APM86791 incorporates one high performance 465 processor. The 465 has five independent pipelines, a 32-KB data cache and a 32-KB instruction cache (which are 64-way set associative), and an IEEE floating point unit (FPU). The 465 core has a dedicated 256KB L2 cache with hardware cache coherency that attaches to the high-performance Processor Local Bus 5 (PLB5).
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Dedicated Ethernet Offload Engines In order to meet the needs of very low power and all-IP networks, the APM86791 includes two dedicated Ethernet Offload Engines. The Ethernet Offload Engine provides for Inline TCP/IP and UDP checksums along with Energy Efficient Ethernet capabilities (802.3az). Classification Engines The classification engines provide for flow, CoS, and port-based classification of data with 64-byte packet line-rate performance. They are programmable and can support IPv4, IPv6, and AppleTalk, as well as customer proprietary protocols. Queue Manager / Traffic Manager (QMTM) The Queue Manager / Traffic Manager is an important design consideration for the APM86791 and allows for the most efficient moving of packets/data between the processors and peripherals using a message passing architecture. This is accomplished through a central communication interface that offloads software from the routing of packets and from transaction synchronization. The Queue Manager can be used to: centralize management of all transaction traffic, reduce communication overhead between software and hardware, and perform inter-processor message passing and work scheduling. SLIMpro – Power Management The APM86791 integrates a dedicated 32-bit SLIMpro acceleration processor that provides advanced capabilities such as dynamic power management and higher layer network acceleration. The SLIMpro processor leverages the APM86791 message passing architecture and other acceleration subsystems in order to provide application-specific processor offloads. It also provides advanced wake up capabilities from Deep Sleep Mode such as Wake on LAN, Wake on USB, Wake on PCIe, and Wake on Interrupts.
APM86791 | 465 Family
DDR3
Deep Sleep Power Domain
APM86791
USB0 RGMII0 RGMII1
GPIO
I2C1
PCIe2, SGMII2, or Serial Trace
SATA0 or SGMII3
PCIe1
SERDES 2
SERDES 0
SERDES 1
DDR PHY 2 x 10/100/1G MAC Classifier
SoC Power Domain Trusted Zone (located in Deep Sleep Power Domain)
Chksum / TSO
I2C1 16/32 + ECC DDR3
RTC Power Domain
SLIMPRO
SCU
RTC PPC Mailbox
Mem Queue
Security EFuse + ROM
USB0 2.0 Host / Device + PHY/Serdes
Classifier
2 x 10/100/1G MAC Classifier Chksum / TSO
PCIe1 x1 Gen2
Packaging • 529-pin PBGA, 19mm x 19mm with 0.8mm pad pitch
SATA0 2.0
Signal I/Os • 296
Advanced DMA The Packet DMA can be used to perform memory-to-memory transfers, which include the SDRAM, SRAM, PCIe, and EBUS memory spaces. Transfers can also include certain “onthe-fly” data manipulations such as: checksum generation or checking and CRC generation or checking. The Packet DMA comprehends data
QMLite to PPC465
PLB5 / HBF
PLB5
HBF
L2 Cache 256 KB
Security
Queue Mgr Traffic Mgr
PPC465
Context Mgr
Packet DMA
32KB OCM
CRC chksum
Adapter
HBF / AHB
S D U
AHB
MPIC
FPU Interrupts
2 x SDHC
AHB / APB
2 x HDLC
4 x UART
I2C0
JTAG
USB1 2.0 Host + PHY/Serdes
APB
Clocks
GPIO
Power Supply • 0.9V (CPU/SoC logic), 1.5V (DDR3), 1.8 V, 2.5 V, and 3.3 V
2 x SPI
Junction Temperature Range • -40ºC to +110ºC
SGMII3
Performance • 2000 Dhrystone 2.1 MIPS @ 1.0 GHz
APM86791 Partner Ecosystem AppliedMicro's APM86791 processors are supported by an extensive Partner ecosystem of products and services from a wide range of leading suppliers, including industry standard providers of: • Embedded operating systems • Hardware and software development tools • Embedded software products and services • Board-level products • System design services • Technical training AppliedMicro offers an evaluation kit for product evaluation and for early software development.
SGMII2
465 Core Frequency • Up to 1.0 GHz
PCIe2 x1 Gen2
# Power Core / L2 Cache • 1x 465 core / 256 KB L2 cache
packet delineation, which enables it to perform a comprehensive list of scatter/gather operations for packet assembly and disassembly with minimal software intervention.
Advanced Security Engine The APM86791 can deliver advanced security capabilities with the optional security engine. This security engine utilizes the QMTM for the fastest possible throughput between the 465 processor, memory, and the security engine itself. The security engine supports the following algorithms: DES, 3DES, AES, ARC-4 encryption, MD-5, SHA-1, SHA-256, and SHA-512 hashing with or without HMAC, Kasumi F8/F9, and also includes acceleration for the following protocols: IPSec, SSL/TLS/ DTLS, and SRTP/SRTCP. A true random number generator and a public key accelerator are also included.
Serial Trace
Specifications
NAND + NOR + EBUS
DATA/ADDR 8b / 16b or Parallel Trace
USB1
For technical support, please call 1-800-840-6055 or 858-535-6517, or email
[email protected]. AppliedMicro reserves the right to make changes to its products, its data sheets, or related documentation, without notice and warrants its products solely pursuant to its terms and conditions of sale, only to substantially comply with the latest available data sheet. Please consult AppliedMicro’s Term and Conditions of Sale for its warranties and other terms, conditions and limitations. AppliedMicro may discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information is current. AppliedMicro does not assume any liability arising out of the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. AppliedMicro reserves the right to ship devices of higher grade in place of those of lower grade. APPLIEDMICRO SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. AppliedMicro, AMCC, and PACKETpro are trademarks of Applied Micro Circuits Corporation. Power and the Power logo are registered trademarks of Power.org. All other trademarks are the property of their respective holders. Copyright © 2011 Applied Micro Circuits Corporation. All Rights Reserved. APM86791_PB_v0.5_20110609
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